Infineon Aurix

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Infineon Aurix support

ERIKA Enterprise supports the Infineon AURIX family microcontrollers. The support for RT-Druid it will be released soon. Currently only the TC27x AURIX family have been fully ported:

  1. Support for the HIGHTEC GCC Compiler (form both single and multicore) and TASKING compiler (only for singlecore).
  2. Support for single- and multi-stack configurations.
  3. ISR Type 1 and Type 2.
  4. ORTI support.
  5. Full Lauterbach support.
  • Supported compilers:
    • HIGHTEC GCC Compiler v4.6.2.0 (for both Single and Multicore).
    • TASKING VX-toolset for TriCore v4.0r1 (only for singlecore)
  • Mode of operation
    • Monostack: The Monostack configuration of the ERIKA Kernel models the fact that all tasks and ISRs in the system share the same stack.
    • Multistack: Every thread can have its private stack, or it can share it with other threads.
    • Multicore: It follows the same philosophy used by ERIKA on other multicore systems and specified by Autosar: two instances of the operating systems run on the two cores, and communication between cores is performed with a few APIs and shared memory.

MCU & Board

  • The porting have been completly developed on top of:
    • TriBoard TC2x5 v2.0 equiped with a TC275TE MCU

Target Configuration and Programming

ERIKA Enterprise is configured through RT-Druid and an OIL file. Here are listed, after the information to set compiler path, the OIL fields custumized for Tricore Aurix architecture.

Compiler Path

It is possible to choose the path of the compiler in three different ways:

  • PATH enviornment variable: You can put compilers bin directories in PATH and the environmet can use them from here.
  • Compiler specific environment variables:
    • HIGHTEC GCC toolchain: You can specify the compiler path for HIGHTEC GCC with the TRICORE_GCCDIR.
    • Altium TASKING toolchain: You can specify the compiler path for Altium TASKING with the TRICORE_TASKINGDIR.
  • RT-Druid configuration file see RT-Druid configuration#Compiler paths:
    • preference_tricore__path_for_gnu_compiler set HIGHTEC gcc compiler path for Tricore AURIX
    • preference_tricore__path_for_tasking_compiler set Altium TASKING compiler path for Tricore AURIX


CPU_DATA must be set to TRICORE. The compiler is specificed with the COMPILER_TYPE item, supported values are GNU (the default value) and TASKING.

On multicore systems, one CPU_DATA instance can exist for each core. They must have different IDs. See ERIKA multicore support for more details about multicore systems on Erika. Later in this page you will find a paragraph relative to specific multicore support developed for Tricore Aurix, according to Autosar OS 4.0 Rev 3 specifications.

Tricore AURIX support CPU clock configuration with a simple PLL driver. The target clock value in MHz can be set with the CPU_CLOCK' field. We kept the algorithm to avaluate PLL parameters simple, so it implements a best effort approach to set the right value. In any case max declared CPU clock value (i.e. 200 Mhz for TC27x family), is guaranteed to be perfectly matched.

N.B. To get the real value set you can use EE_tc27x_get_clock() API after executing StartOS, PLL configuration is done during OS start-up.

Example of a CPU_DATA section:

     CPU_CLOCK = 200.0;
     APP_SRC = "code.c";
       IRQ_STACK = TRUE {
           SYS_SIZE = 128;


MCU_DATA support only the TC27x value. Compiler can be specified even in MCU_DATA block and will inherited by all configured CPUs (useful in multicore project configuration).

   MODEL = TC27x;

OSEK/VDX Extensions

This Section contains information about the OSEK/VDX Extensions (or optional features) that have been implemented for the AURIX support.

Resource Managament at ISR level

This feauture is automatically enabled by RT-Druid during the configuration generation step. To specify that a Resource is used by both a Task and a ISR you need to add that resource to the corrisponding ISR object as follows:

 TASK Task1 {
   RESOURCE = "ResourceA";
   RESOURCE = "ResourceA";

System Timer

The OSEK/VDX standard provides support for a System Counter (a counter that is automatically linked to a hardware timer). The System Timer is used to give a coherent timing reference across the entire application.

In ERIKA Enterprise, this special counter has been named System Timer. To use it, you need to set a specific attribute in a Counter definition. Please note that only one counter for each core can be the System Timer.

A Counter which is not a System Counter must be incremented explicitly using the Autosar primitive IncrementCounter.

The following is an example OIL definition for a System Counter:

   CPU_CLOCK = 200.0;
 COUNTER SystemTimer {
   MINCYCLE = 1;
   MAXALLOWEDVALUE = 2147483647;
     DEVICE = "STM_SR0";
     PRIORITY = 1;

The meaning of the various attributes is as follows:

  • CPU_DATA/CPU_CLOCK is used to declare the clock frequency (in MHZ).
  • COUNTER/TYPE must be set to HARDWARE, and SYSTEM_TIMER must be set to true.
  • COUNTER/TYPE/DEVICE must be a valid device that can be used for a system timer. Currently, for TRICORE only STM (System Timer Module) MCU peripheral is a valid device for system timer. Both Interrupt source of this peripheral can be set to device and allowed values are STM_SR0 and STM_SR1
  • SECONDSPERTICK is used to declare the wanted time duration of one hardware tick in seconds.

The System Timer can be attached to ALARMs as usual, as in the following example:

 ALARM AlarmExample {
   COUNTER = SystemTimer;
      TASK = TaskExample;

Interrupt Handling

Due to the special implementation of the Interrupt Vector in AURIX architecture, each entry of the vector table is simply identified by it's priority value. It must be the application code that configure the service request node (SRN') with the right priority, assigning in this way the right handler.

 ISR IsrLow {
   CATEGORY = 2;
   PRIORITY = 1;
   HANDLER = "isr_low"; 

The mean of the fields are:

  • CATEGORY: the type of ISR as specified by OSEK.
  • PRIORITY: The ISR priority that represent it's position inside Interrupt Vector so it has to be considered as ISR Identifier. The ENTRY field, the one usually used to declare Interrupt IDs, is still available but it's superfluous because it has to be equal to PRIORITY and, in any case, priority value take the precedence.
  • HANDLER: Declare the interrupt handler symbol. If it's not declared the the handler symbol is supposed to be equal to ISR block name (IsrLow in the example).
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