Installation of Mico32/FPG-EYE development environment

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All FPG-EYE development has been made with ispLEVER 8.0 and correspondant LatticeMico System Development Tools.
All FPG-EYE development has been made with ispLEVER 8.0 and correspondant LatticeMico System Development Tools.
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Hereunder it's supposed that all the tools are installed in the same base directory and we refer at this folder as:
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Hereunder it's supposed that all the tools are installed in the same base directory and we refer at this directory as:
'''%ispTOOLS%'''
'''%ispTOOLS%'''
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During FPG-EYE software development we found and correct a few bugs in standard Mico32 components. Especially we found bung in following components:
During FPG-EYE software development we found and correct a few bugs in standard Mico32 components. Especially we found bung in following components:
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* SPI Flash Controller (Component folder: spi_flash. Verilog files: spi_flash_intf.v wb_intf.v)
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* SPI Flash Controller (Component directory: spi_flash. Verilog files: spi_flash_intf.v wb_intf.v)
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* Async SRAM Controller (Componet folder: asram_top. Verilog files: asram_core.v)
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* Async SRAM Controller (Componet directory: asram_top. Verilog files: asram_core.v)
We found these bugs in ispLEVER version 8.0 components. we don't know if they have been fixed in later versions.  
We found these bugs in ispLEVER version 8.0 components. we don't know if they have been fixed in later versions.  
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You can found the patched verilog files [here]. To apply the patches you need to copy these new files in the right componets folders. The base directory for components folder is: %ispTOOLS%\micosystem\components. You have to put patched verilog files for each component in  
+
You can found the patched verilog files [here]. To apply the patches you need to copy these new files in the right componets folders. The base directory for components is: %ispTOOLS%\micosystem\components. You have to put patched verilog files for each component in  
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%ispTOOLS%\micosystem\components\<Component folder>\rtl\verilog to fix found bugs
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%ispTOOLS%\micosystem\components\<Component directory>\rtl\verilog to fix found bugs

Revision as of 09:52, 29 September 2011

Introduction

This tutorial describes a set of steps needed to compile and deploy a platform on FPG-EYE board.

To achive this goal you need follow softwares from Lattice installed in your environment (follow links for download pages):

To download and use these softwares you need a Lattice registration and a fre license (follow instruction on Lattice web site)

Be careful each version of ispLEVER need a correspondent version of LatticeMico System Development Tools. In regard to ispVM System you need version 18.0 or superior.

All FPG-EYE development has been made with ispLEVER 8.0 and correspondant LatticeMico System Development Tools.

Hereunder it's supposed that all the tools are installed in the same base directory and we refer at this directory as: %ispTOOLS%

Standard Mico32 components Patches

During FPG-EYE software development we found and correct a few bugs in standard Mico32 components. Especially we found bung in following components:

  • SPI Flash Controller (Component directory: spi_flash. Verilog files: spi_flash_intf.v wb_intf.v)
  • Async SRAM Controller (Componet directory: asram_top. Verilog files: asram_core.v)

We found these bugs in ispLEVER version 8.0 components. we don't know if they have been fixed in later versions.

You can found the patched verilog files [here]. To apply the patches you need to copy these new files in the right componets folders. The base directory for components is: %ispTOOLS%\micosystem\components. You have to put patched verilog files for each component in %ispTOOLS%\micosystem\components\<Component directory>\rtl\verilog to fix found bugs

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