Tutorial: Building a Mico32 platform for FPG-EYE

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(Importing meminit_ebr.mem bootloader file in the Diamond)
 
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= Introduction =
= Introduction =
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This page explains how to build a configuration file for FPG-EYE's fpga from a source platform with binary camera. To do that you neead a local copy of Erika repopsitory,follow
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This page explains how to build a configuration file for FPG-EYE's fpga from a source platform with binary camera.  
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[[ERIKA_Enterprise_and_RT-Druid_SVN_Access#Anonymous.2C_readonly_access | ERIKA_Enterprise_and_RT-Druid_SVN_Access]] page's instructions to get that.
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Prerequisites:
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* [[Installation of Mico32/FPG-EYE development environment | Install Mico32/FPG-EYE development environment]]
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* Get a local copy of Erika repository to have the platform projects.
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For further info see this page:[[ERIKA_Enterprise_and_RT-Druid_SVN_Access#Anonymous.2C_readonly_access | ERIKA Enterprise and RT-Druid SVN Access instructions]].
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* To download the platform JEDEC file, you need a '''programming cable''' connected to the JTAG port of the board, follow the instructions on [http://erika.tuxfamily.org/wiki/index.php?title=Programming_the_FPG-EYE_board  How programming the FPG-EYE board].
= Import platform project in LatticeMico System IDE =
= Import platform project in LatticeMico System IDE =
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[[File:open_msb_from_msb_ide.png|center|thumb|700px| Open '''MSB''' platform]]
[[File:open_msb_from_msb_ide.png|center|thumb|700px| Open '''MSB''' platform]]
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Click the '''Browse''' button and load ''ee/trunk/ee/examples/mico32/demo/platforms/camera_debug_50/msb/soc/camera_debug_50.msb'' file inside Erika repository local copy:
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Now if you are using the software ispLever click the '''Browse''' button and load '''ee/trunk/ee/examples/mico32/demo/platforms/fpg_eye_isplever/msb/soc/fpg_eye_mico32.msb''' while, if you are using the software Diamond click the '''Browse''' button and load '''ee/trunk/ee/examples/mico32/demo/platforms/fpg_eye_diamond/msb/soc/fpg_eye_mico32.msb''' file inside Erika repository local copy.
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[[File:select_camera_50_msb_from_msb_ide.png|center|thumb|700px| Select ''camera_50.msb'']]
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[[File:Select_fpg_eye_mico32_msb_from_msb_ide.png|center|thumb|700px| Select ''fpg_eye_mico32.msb'']]
The platform's architecture is visible under '''Sources in Project''' window:
The platform's architecture is visible under '''Sources in Project''' window:
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[[File:platform architecture_from_msb_ide.png|center|thumb|700px| Select ''camera_50.msb'' platform architecture]]
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[[File:fpg_eya_mico32_from_msb.png|center|thumb|700px| Select ''fpg_eye_mico32.msb'' platform architecture]]
Note: You don't need to make any changes to the platform.
Note: You don't need to make any changes to the platform.
And finally, generate the platform source by selecting the '''Run Generator''' menu item:
And finally, generate the platform source by selecting the '''Run Generator''' menu item:
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[[File:run_generator_from_msb_ide.png|center|thumb|700px| Clicking on '''Run Generator''' we have the platform source]]
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[[File:fpg_eya_mico32_from_msb_run.png|center|thumb|700px| Clicking on '''Run Generator''' we have the platform source]]
The [http://www.latticesemi.com/products/intellectualproperty/ipcores/mico32/index.cfm mico32] platform's Verilog source is generated. To use this platform in FPG-EYE, the source code must be compiled in binary format.
The [http://www.latticesemi.com/products/intellectualproperty/ipcores/mico32/index.cfm mico32] platform's Verilog source is generated. To use this platform in FPG-EYE, the source code must be compiled in binary format.
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[[File:open_project_from_ispLever_ide.png|center|thumb|700px| ''Open project'' from ispLever]]
[[File:open_project_from_ispLever_ide.png|center|thumb|700px| ''Open project'' from ispLever]]
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Load '''ee/examples/mico32/demo/platforms/camera_debug_50/isplever/camera_debug_50.syn''' inside Erika repository local copy:
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Load '''ee/examples/mico32/demo/platforms/fpg_eye_isplever/isplever/fpg_eye_mico32.syn''' inside Erika repository local copy:
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[[File:camera_50_from_ispLever_ide.png|center|thumb|700px| Load ''camera_50.msb'']]
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[[File:fpg_eya_mico32_from_ispLever.png|center|thumb|700px| Load ''fpg_eye_mico32.msb'']]
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The hardware project structure is visible under ''Sources in Project'' window. Ensure that ''camera_50_wrapper.v'' is selected and active:
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The hardware project structure is visible under ''Sources in Project'' window. Ensure that ''fpg_eye_mico32_wrapper.v'' is selected and active:
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[[File:struct_camera_50_from_ispLever_ide.png|center|thumb|700px| ''ispLever'' project structure]]
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[[File:fpg_eye_mico32_wrapper_active.png|center|thumb|700px| ''ispLever'' project structure]]
Before compiling the ispLever project, there are two more steps to perform (refer sections below).
Before compiling the ispLever project, there are two more steps to perform (refer sections below).
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== Importing ''camera_component_mod.ngo'' in the ispLever ==
== Importing ''camera_component_mod.ngo'' in the ispLever ==
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The component camera installed in the platform camera_50 is a binary version. So it is necessary to import in the ispLever the netlist of the camera. To do this, copy the file ''camera_component_mod.ngo'', from the [[FPG-EYE Software Packet]] to the ispLever project directory.
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The component camera installed in the platform ''fpg_eye_mico32'' is a binary version. So it is necessary to import in the ispLever the netlist of the camera. To do this, copy the file ''camera_component_mod.ngo'', from the [http://download.tuxfamily.org/erika/webdownload/fpg-eye/FPG-EYE_software_packet.zip FPG-EYE Software Packet] to the ispLever project directory.
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[[File:camera_component_mod_in_ispLever_directory.png|center|thumb|700px| ''camera_component_mod.ngo'' in ispLever project directory]]
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[[File:camera_component_ngo_in ispLever.png|center|thumb|700px| ''camera_component_mod.ngo'' in ispLever project directory]]
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== Importing ''meminit_ebr.mem'' bootloader file in the ispLever ==
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== ''meminit_ebr.mem'' bootloader file in the ispLEVER ==
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The file ''meminit_ebr.mem'' is a compiled file. It is the program bootloader which will be placed in the XP2 EBR non volatile memory. For the bootloader reference guide, refer section [[mico32_bootloader]]. Copy this file from the [[FPG-EYE Software Packet]] to the ispLever project directory.
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The file ''meminit_ebr.mem'' is the compiled file. It is the program bootloader which will be placed in the XP2 EBR non volatile memory. For the bootloader reference guide, refer section [[Tutorial: Running ERIKA on Mico32 and FPG-EYE]]. Be sure that the file is present in the ispLever project directory.
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[[File:meminit_ebr_mem_in_ispLever_directory.png|center|thumb|700px| ''meminit_ebr.mem'' in ispLever project directory]]
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[[File:isp_lever_mem_file.png|center|thumb|700px| ''meminit_ebr.mem'' in ispLever project directory]]
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= Build the platform with ispLever =
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== Build the platform with ispLEVER ==
On '''Processes of current source''' click and select '''Generate Data File (JEDEC)''' then right click and select '''Force''' :
On '''Processes of current source''' click and select '''Generate Data File (JEDEC)''' then right click and select '''Force''' :
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[[File:force_form_ispLever.png|center|thumb|700px| '''Force''' from '''Generate Data File (JEDEC)''' menu]]
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[[File:isp_lever_compile_fpg_eye_mico32.png|center|thumb|700px| '''Force''' from '''Generate Data File (JEDEC)''' menu]]
When the process is complete the file the FPGA configuration file '''JEDEC''' is ready to use.
When the process is complete the file the FPGA configuration file '''JEDEC''' is ready to use.
[[File:generate_data_file_jedec_from_isplever.png|center|thumb|700px| '''Generate Data File (JEDEC)''']]
[[File:generate_data_file_jedec_from_isplever.png|center|thumb|700px| '''Generate Data File (JEDEC)''']]
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= Import hardware platform project in Diamond IDE =
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Open [http://www.latticesemi.com/products/designsoftware/diamond Diamond] and select ''Open Project'' under ''File menu'':
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[[File:open_project_from_diamond_ide.png|center|thumb|700px| ''Open project'' from Diamond]]
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Load '''ee/examples/mico32/demo/platforms/fpg_eye_diamond/diamond/fpg_eye_mico32.ldf''' inside Erika repository local copy:
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[[File:fpg_eya_mico32_from_diamond.png|center|thumb|700px| Load ''fpg_eye_mico32.msb'']]
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The hardware project structure is visible under ''Sources in Project'' window. Ensure that ''fpg_eye_mico32_wrapper.v'' is selected and active:
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[[File:fpg_eye_mico32_wrapper_active_diamond.png|center|thumb|700px| ''Diamond'' project structure]]
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Before compiling the Diamond project, there are two more steps to perform (refer sections below).
 +
 +
== Importing ''camera_component_mod.ngo'' in the Diamond ==
 +
 +
The component camera installed in the platform ''fpg_eye_mico32'' is a binary version. So it is necessary to import in the Diamond the netlist of the camera. To do this, copy the file ''camera_component_mod.ngo'', from the [http://download.tuxfamily.org/erika/webdownload/fpg-eye/FPG-EYE_software_packet.zip FPG-EYE Software Packet] to the Diamond project directory.
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[[File:camera_component_ngo_in_diamond.png|center|thumb|700px| ''camera_component_mod.ngo'' in Diamond project directory]]
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== ''meminit_ebr.mem'' bootloader file in the Diamond ==
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The file ''meminit_ebr.mem'' is a compiled file. It is the program bootloader which will be placed in the XP2 EBR non volatile memory. For the bootloader reference guide, refer section [[Tutorial: Running ERIKA on Mico32 and FPG-EYE]]. Be sure than this file is present in the Diamond project directory.
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[[File:diamond_mem_file.png|center|thumb|700px| ''meminit_ebr.mem'' in Diamond project directory]]
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== Build the platform with Diamond ==
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On '''Processes of current source''' click and select '''Generate Data File (JEDEC)''' then right click and select '''Return All''' :
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[[File:diamond_compile_fpg_eye_mico32.png|center|thumb|700px| '''Force''' from '''Generate Data File (JEDEC)''' menu]]
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When the process is complete the file the FPGA configuration file '''JEDEC''' is ready to use.
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[[File:generate_data_file_jedec_from_diamond.png|center|thumb|700px| '''Generate Data File (JEDEC)''']]
= Programming the platform on FPG-EYE board =
= Programming the platform on FPG-EYE board =
The last step is download the '''JEDEC''' file into ''FPG-EYE''. Please follow the [[Programming the FPG-EYE board]] istructions.
The last step is download the '''JEDEC''' file into ''FPG-EYE''. Please follow the [[Programming the FPG-EYE board]] istructions.

Latest revision as of 14:03, 16 January 2012

Contents

Introduction

This page explains how to build a configuration file for FPG-EYE's fpga from a source platform with binary camera. Prerequisites:

For further info see this page: ERIKA Enterprise and RT-Druid SVN Access instructions.

  • To download the platform JEDEC file, you need a programming cable connected to the JTAG port of the board, follow the instructions on How programming the FPG-EYE board.

Import platform project in LatticeMico System IDE

Launch LatticeMico System software, and click on MSB Perspective button (as the following figure):

MSB button

Open the Open Platform form by selecting the File->Open Platform menu item:

Open MSB platform

Now if you are using the software ispLever click the Browse button and load ee/trunk/ee/examples/mico32/demo/platforms/fpg_eye_isplever/msb/soc/fpg_eye_mico32.msb while, if you are using the software Diamond click the Browse button and load ee/trunk/ee/examples/mico32/demo/platforms/fpg_eye_diamond/msb/soc/fpg_eye_mico32.msb file inside Erika repository local copy.

Select fpg_eye_mico32.msb

The platform's architecture is visible under Sources in Project window:

Select fpg_eye_mico32.msb platform architecture

Note: You don't need to make any changes to the platform. And finally, generate the platform source by selecting the Run Generator menu item:

Clicking on Run Generator we have the platform source

The mico32 platform's Verilog source is generated. To use this platform in FPG-EYE, the source code must be compiled in binary format. The next session explains how to compile the Verilog platform's code with ispLEVER tool.

Import hardware platform project in ispLever IDE

Open ispLEVER and select Open Project under File menu:

Open project from ispLever

Load ee/examples/mico32/demo/platforms/fpg_eye_isplever/isplever/fpg_eye_mico32.syn inside Erika repository local copy:

Load fpg_eye_mico32.msb

The hardware project structure is visible under Sources in Project window. Ensure that fpg_eye_mico32_wrapper.v is selected and active:

ispLever project structure

Before compiling the ispLever project, there are two more steps to perform (refer sections below).

Importing camera_component_mod.ngo in the ispLever

The component camera installed in the platform fpg_eye_mico32 is a binary version. So it is necessary to import in the ispLever the netlist of the camera. To do this, copy the file camera_component_mod.ngo, from the FPG-EYE Software Packet to the ispLever project directory.

camera_component_mod.ngo in ispLever project directory

meminit_ebr.mem bootloader file in the ispLEVER

The file meminit_ebr.mem is the compiled file. It is the program bootloader which will be placed in the XP2 EBR non volatile memory. For the bootloader reference guide, refer section Tutorial: Running ERIKA on Mico32 and FPG-EYE. Be sure that the file is present in the ispLever project directory.

meminit_ebr.mem in ispLever project directory

Build the platform with ispLEVER

On Processes of current source click and select Generate Data File (JEDEC) then right click and select Force :

Force from Generate Data File (JEDEC) menu

When the process is complete the file the FPGA configuration file JEDEC is ready to use.

Generate Data File (JEDEC)

Import hardware platform project in Diamond IDE

Open Diamond and select Open Project under File menu:

Open project from Diamond

Load ee/examples/mico32/demo/platforms/fpg_eye_diamond/diamond/fpg_eye_mico32.ldf inside Erika repository local copy:

Load fpg_eye_mico32.msb

The hardware project structure is visible under Sources in Project window. Ensure that fpg_eye_mico32_wrapper.v is selected and active:

Diamond project structure

Before compiling the Diamond project, there are two more steps to perform (refer sections below).

Importing camera_component_mod.ngo in the Diamond

The component camera installed in the platform fpg_eye_mico32 is a binary version. So it is necessary to import in the Diamond the netlist of the camera. To do this, copy the file camera_component_mod.ngo, from the FPG-EYE Software Packet to the Diamond project directory.

camera_component_mod.ngo in Diamond project directory

meminit_ebr.mem bootloader file in the Diamond

The file meminit_ebr.mem is a compiled file. It is the program bootloader which will be placed in the XP2 EBR non volatile memory. For the bootloader reference guide, refer section Tutorial: Running ERIKA on Mico32 and FPG-EYE. Be sure than this file is present in the Diamond project directory.

meminit_ebr.mem in Diamond project directory

Build the platform with Diamond

On Processes of current source click and select Generate Data File (JEDEC) then right click and select Return All :

Force from Generate Data File (JEDEC) menu

When the process is complete the file the FPGA configuration file JEDEC is ready to use.

Generate Data File (JEDEC)

Programming the platform on FPG-EYE board

The last step is download the JEDEC file into FPG-EYE. Please follow the Programming the FPG-EYE board istructions.

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